The AUD connector allows quite simple protocol to read and write to the 7052 processor address space. In e10a (the AUD interface kit) a refenrence is made that only RAM address can be read, anyhow the protocol itself does not limit the address space and it is possible that e10a is limited due to copyright issues - so its worth while to check if the flash rom area can be read with AUD protocol. If the flash rom can not be read, then at least an user level microkernel can be copied using AUD to RAM memory and then FDT can be used for reading the flash memory (all this in theory). The e10a AUD interface is available from Renesas for appr 2000usd (1600eur) - but with the limitation to access only RAM area, so we need to build sw and hw for the interface to try out the access to FLASH ROM area.
To be able to access the memory we need a program that according to the flowchart below executes the signal timing below. In prinsiple this is very simple to write - but unfortunately I have about 20 years since I have written C so need some help on this.
The logic is very simple and communications just uses seven one bit registers (PB0..PB6):- PB5 (AUDCLK) is a clock signal that is programmed going up and down with a small inbuilt delay. I dont know if this should be synchronized with a clock or if it can vary a lot. But as it is used for reading and writing I would assume it not being so citical to have an exact pulsewidth on this.- Set PB5 (DIRection) down to write to the bus- Set PB4 (AUDSYNCinverted) down to start reading- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a dummybit 0000 to start the sequence- Wait for next PB5 cycle- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a command 1010, i.e. read from memory- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) the memory address e.g. 0xffffc000 4 bits at a time by each PB5 clock pulse- Set PB6 (DIRection) up- Wait from the bus PB0,PB1,PB2,PB3 (AUDATA) to receive readyflag bits 0001: wait for each clockpulse until changed.- Set PB4 (AUDSYNCinverted) up as a signal that we are ready to start reading the memory contents- Read from the bus PB0,PB1,PB2,PB3 (AUDATA) the memory content, e.g. 0x01234567, four bits at a time.- Repeat the above for each memory byte to be read...
The flowchart for the program is the following:http://macmadigan.no-ip.com/Public/ECU/sh7052/AUD_read_flowchart.JPG
The signalling is the following:http://macmadigan.no-ip.com/Public....ing.JPG
The HW interface to AUD bus is very easy and well described. http://macmadigan.no-ip.com/Public/ECU/sh7052/AUD_hw_interface.JPGAll the related documents for this project with self explanatory names are found here:http://macmadigan.no-ip.com/Public/ECU/SH7052/For this project I have SH7086 RSK which I thought to be using. For easy trialling and bug finding I can just connect the PB0..PB6 directly to RSK7086 AUD connector and use e8a for monitoring the program and knowing exactly the memory contents with Renesas Embedded Workshop. The RSK7086 costs around 150usd from Renesas including e8a which can also be used as a programmer over the serial line. Alternatively a PIC could be used as suggested by bozo.http://macmadigan.no-ip.com/Public/ECU/sh7052/RSK7086.jpg
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Ok gents, please do not laugh - rather remember that its 20years since I have written C. Anyway this is what I came up as a sketch idea - so your comments would he appreciated...EDIT - moved the coding concept idea to an attachment which is here:http://macmadigan.no-ip.com/Public/ECU/aud_pgm_draft.txt
7052 hardware manual, page 840 (real page, not the PDF page number) / paragraph 24.3.11 Aud timing:RAM monitor output data delay time = min 7ns, max 80nsRAM monitor clock cycle = min 100nsRAM monitor clock low pulse width = min 45ns RAM monitor output data hold time = 5ns RAM monitor SYNC setup time = 20nsMaybe this gives us some guidance on timing the signals correctly ?
Checked also the vector tables. In EVO code the first long word is a real jump address. In this the 0000:0040 or 0040:0000 really puzzles me. The first byte is supposedly program counter and second byte is stack pointer (SP i.e. @R15) to be loaded. I think that the EVO code is not really from a 7052 ?Below the vector tables from hardware manual.
The way I read the documentation it said that when downloading to the flash via AUD (i.e. from PC to ECU) you need to download a special program into the RAM area which takes care of writing to the flash.There is a source code avail for the above, but I guess its really an overkill as the serial protocol and FDT provides a very good tool for flashing.It will be interesting to see when you have the complete .bin downloaded to verify it to see if the checksum still matches.I am still far away (days) from having the code implemented for reading the flash. Just spend quite a few hours with inttohexstr function just to be able to see the output on the LCD screen.
The source code for writing from RAM to flash for other processors like H8 etc... can be found from Renesas homepage. It does not look complicated but does generate coplexity as the program must be first downloaded to ram if I recall correclty (otherwise timing from e.g. SIO or AUD input may be quite difficult). Anyhow FDT can be used very easily with a simple max232 circuit. That is described quite well on the busa thread on this board.At this end the most complex part on AUD programming has been to relearn C and the SH7086 prosessor IO as a completely new animal. I think I am still adding too much complexity into the code just because of lack of experience. Anyway I think its about there and next its time to look into building the HW interface. Here is a link to the latest in case you want to comment on it.http://macmadigan.no-ip.com/Public/ECU/aud_pgm_draft2.txt
PetriK wrote:Yes - I am also very tempted with the propeller kit... What are the sw tools that is used with that (i.e. programming environment and programming language ?).
Had a problem with the audrst signal. Found out with measuring the voltages from the 7052 AUD connector that it was below the voltage from other pins. Even though I had checked the board with a stereo magnifying glasses before hooking to the ECU I could not see it.The rest is self explanatory:Renesas RSKSH7086 based AUD read program00000000,00000000,0000040000000001,00000004,FFFFAFAF00000002,00000008,0000040000000003,0000000C,FFFFAFAF00000004,00000010,00022B2000000005,00000014,00022B2000000006,00000018,00022B2000000007,0000001C,00022B2000000008,00000020,00022B2000000009,00000024,00022B200000000A,00000028,00022B200000000B,0000002C,000662100000000C,00000030,000992100000000D,00000034,00022B200000000E,00000038,00022B200000000F,0000003C,00022B20Here is the link to the software that was used:http://macmadigan.no-ip.com/Public/ECU/aud_pgm_working1.txtRegarding interface I removed the AUDRST 10K resistor, there is no need for that with RSK7086. Have updated the schematics below accordingly:ps. Without being experienced with C can you hint if there is a more educated way of putting the lsb and msb in righ order than building the lsb and msb in separate loops ?
PetriK wrote:Also took some time to understand (for me who has not used C for 20 yeards) that ^ is XOR not power of...
Also took some time to understand (for me who has not used C for 20 yeards) that ^ is XOR not power of...