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Post Info TOPIC: triggering the A/D conversions

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triggering the A/D conversions

Has anyone figured out how the A/D conversions are triggered?

From what I can gather, the A/D conversions can be triggered in one of two ways: either by software (ATU) or by an external trigger (ADTRG0).

It appears that in the early code, the ADTRG registers are loaded with FF. The only bit in these registers that is used is bit 7 (EXTRG, external trigger enable), and setting it to 1 implies "A/D conversion is triggered by an external pin input ADTRG).

Now, this external pin (ADTRG) is pin #121. (which is also IRQ3).

But despite a lot of physical probing around the ECU board, I can't work out what this pin is connected to. It appears that the trace disappears under the 7052, and I can't get a continuity reading to any of the vias or components on either side of the PCB. ???

Originally I was hoping that a periodic interrupt from the compare and match interrupt was sending a signal out on one pin which might have been electrically connected to pin #121 thereby causing the A/D conversion trigger in a round-about way ... but I can't detect a direct connection between #121 and any other pin on the 7052. Maybe there's a resistor under the chip??

Anyway, if anyone's got some spare time, I'm interested to see if you can trace pin#121 to anything.




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Yep ... I think it goes like the below...

If I recall correctly something like FFFFF42C, bit6 sets timer to interrupt also an AD conversion.

ROM:000014EA IRQ_ATU02_ICI0B_loc_14EA:               ; DATA XREF: ROM:00000158o
ROM:000014EA                 mov.l   r7, @-r15
ROM:000014EC                 mov.l   r6, @-r15
ROM:000014EE                 mov.l   r5, @-r15
ROM:000014F0                 mov.l   r4, @-r15
ROM:000014F2                 mov.l   r3, @-r15
ROM:000014F4                 mov.l   r2, @-r15
ROM:000014F6                 mov.l   r1, @-r15
ROM:000014F8                 mov.l   r0, @-r15
ROM:000014FA                 sts.l   pr, @-r15
ROM:000014FC                 mov.w   @(h'96,pc), r4 ; [00001596] = h'F42C ; Timer Status Register 0
ROM:000014FE                 mov.w   @r4, r3
ROM:00001500                 mov.w   @(h'96,pc), r2 ; [0000159A] = h'FD ; 11111101
ROM:00001502                 mov.l   @(h'A4,pc), r3 ; [000015A8] = sub_72BC
ROM:00001504                 jsr     @r3 ; sub_72BC
ROM:00001506                 mov.w   r2, @r4
ROM:00001508                 mov.l   @(h'A0,pc), r1 ; [000015AC] = sub_3C7C
ROM:0000150A                 jsr     @r1 ; sub_3C7C
ROM:0000150C                 nop
ROM:0000150E                 mov.l   @(h'A0,pc), r3 ; [000015B0] = sub_72C2
ROM:00001510                 jsr     @r3 ; sub_72C2
ROM:00001512                 nop
ROM:00001514                 lds.l   @r15+, pr
ROM:00001516                 mov.l   @r15+, r0
ROM:00001518                 mov.l   @r15+, r1
ROM:0000151A                 mov.l   @r15+, r2
ROM:0000151C                 mov.l   @r15+, r3
ROM:0000151E                 mov.l   @r15+, r4
ROM:00001520                 mov.l   @r15+, r5
ROM:00001522                 mov.l   @r15+, r6
ROM:00001524                 mov.l   @r15+, r7
ROM:00001526                 rte
ROM:00001528                 nop
ROM:0000152A ; ----------------------------------------------------------------

ROM:000025B4 IRQ_ADI1_loc_25B4:                      ; DATA XREF: ROM:00000308o
ROM:000025B4                 mov.l   r7, @-r15
ROM:000025B6                 mov.l   r6, @-r15
ROM:000025B8                 mov.l   r5, @-r15
ROM:000025BA                 mov.l   r4, @-r15
ROM:000025BC                 mov.l   r3, @-r15
ROM:000025BE                 mov.l   r2, @-r15
ROM:000025C0                 mov.l   r1, @-r15
ROM:000025C2                 mov.l   r0, @-r15
ROM:000025C4                 sts.l   pr, @-r15
ROM:000025C6                 mov.w   @(h'8A,pc), r3 ; [00002654] = h'F838
ROM:000025C8                 mov.b   @r3, r0
ROM:000025CA                 and     #h'7F, r0
ROM:000025CC                 mov.l   @(h'9C,pc), r2 ; [0000266C] = Read_ANgroup3_sensors
ROM:000025CE                 jsr     @r2 ; Read_ANgroup3_sensors
ROM:000025D0                 mov.b   r0, @r3
ROM:000025D2                 lds.l   @r15+, pr
ROM:000025D4                 mov.l   @r15+, r0
ROM:000025D6                 mov.l   @r15+, r1
ROM:000025D8                 mov.l   @r15+, r2
ROM:000025DA                 mov.l   @r15+, r3
ROM:000025DC                 mov.l   @r15+, r4
ROM:000025DE                 mov.l   @r15+, r5
ROM:000025E0                 mov.l   @r15+, r6
ROM:000025E2                 mov.l   @r15+, r7
ROM:000025E4                 rte
ROM:000025E6                 nop

ROM:00003614 Read_ANgroup3_sensors:                  ; CODE XREF: sub_11B8+1416p
ROM:00003614                                         ; DATA XREF: ROM:off_266Co
ROM:00003614                 mov.w   @(h'60,pc), r3 ; [00003678] = h'F839
ROM:00003616                 mov.b   @r3, r0
ROM:00003618                 and     #b'11011111, r0 ; External triggering, stop conversion, continuous scan
ROM:0000361A                 mov.b   r0, @r3         ; set AD control register bits -> @r3
ROM:0000361C                 add     #-1, r3
ROM:0000361E                 mov.b   @r3, r0
ROM:00003620                 and     #b'1111111, r0
ROM:00003622                 mov.b   r0, @r3
ROM:00003624                 mov.l   @(h'60,pc), r4 ; [00003688] = h'FFFF81C8
ROM:00003626                 mov.l   @(h'64,pc), r2 ; [0000368C] = h'FFFF820C
ROM:00003628                 mov.b   @r2, r0
ROM:0000362A                 extu.b  r0, r0
ROM:0000362C                 cmp/eq  #h'C, r0
ROM:0000362E                 bt      read_OXsensor
ROM:00003630                 cmp/eq  #h'D, r0
ROM:00003632                 bt      Unk_AN13_loc_3650
ROM:00003634                 cmp/eq  #h'E, r0
ROM:00003636                 bt      READ_GPS
ROM:00003638                 cmp/eq  #h'F, r0
ROM:0000363A                 bt      READ_TPS
ROM:0000363C                 bra     loc_36AE
ROM:0000363E                 nop

-- Edited by PetriK at 15:32, 2007-12-30


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thanks Petri, but you lost me here

F42C is TSR0 (timer status register 0), and is just a collection of flags right? So it has no bearing on determining how the A/D conversions are initiated?

the ISRs you listed only transfer the results of A/D conversions from their read-only locations (at F800..F817 and F820..F827) to elsewhere in RAM (I think), they don't actually start any A/D conversions - some other trigger must happen to cause the A/D conversion (and write the result to F8xx), and once that's done the A/D unit generates an interrupt to signal that the conversion is complete and that's where the vector at 308 gets called to run the ISR you listed above which then copies the result of the conversion to another location in RAM.

It's the mechanism to trigger an A/D conversion I'm looking for.

Or have I misread something?

Also I note that the code in my ECU for servicing the interrupt vector at 158 is not as lengthy as the code you have.

I have...

ROM:000015E2 loc_15E2:                               ; DATA XREF: ROM:00000158o
ROM:000015E2                 mov.l   r7, @-r15
ROM:000015E4                 mov.l   r6, @-r15
ROM:000015E6                 mov.l   r5, @-r15
ROM:000015E8                 mov.l   r4, @-r15
ROM:000015EA                 mov.l   r3, @-r15
ROM:000015EC                 mov.l   r2, @-r15
ROM:000015EE                 mov.l   r1, @-r15
ROM:000015F0                 mov.l   r0, @-r15
ROM:000015F2                 sts.l   pr, @-r15
ROM:000015F4                 mov.w   @(h'8A,pc), r4 ; [00001682] = h'F42C
ROM:000015F6                 mov.w   @r4, r3
ROM:000015F8                 mov.w   @(h'8A,pc), r2 ; [00001686] = h'FD
ROM:000015FA                 mov.l   @(h'98,pc), r3 ; [00001694] = loc_2C56
ROM:000015FC                 jsr     @r3 ; loc_2C56
ROM:000015FE                 mov.w   r2, @r4
ROM:00001600                 lds.l   @r15+, pr
ROM:00001602                 mov.l   @r15+, r0
ROM:00001604                 mov.l   @r15+, r1
ROM:00001606                 mov.l   @r15+, r2
ROM:00001608                 mov.l   @r15+, r3
ROM:0000160A                 mov.l   @r15+, r4
ROM:0000160C                 mov.l   @r15+, r5
ROM:0000160E                 mov.l   @r15+, r6
ROM:00001610                 mov.l   @r15+, r7
ROM:00001612                 rte
ROM:00001614                 nop

which only has one jsr to 2C56, and sub_2C56 just sets the interrupt mask bits in the status register then sits in an endless loop (waiting for an interrupt of some sort) ...

ROM:00002C60 loc_2C60:                               ; CODE XREF: ROM:loc_2C60j
ROM:00002C60                 bra     loc_2C60

at aglance it looks like the operation of the code is similar but not the same between our ECUs ???



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Oh - I remembered incorrectly, remembered that to be ITVRR. That memory come from vaguely remembering that its ATU that triggers the AD conversion.

Now when looking at the code again I noticed that the external triggering is turned off while copying the AD values into RAM variables so that indicates that there possibly is an external trigger. And while writing this another thought occured into my mind - the TPS sensor seems to be connected to two AD inputs indicating that there may even be more conversion triggers.

Just out of curiosity - why are you interested in about AD conversion triggers ? At least in busa its the downcount timers that  are used for fuel and ignition. Then interestingly the crankpulse seems to have some kind of frequency correction which is stopped for missing tooth... so I have not even thought the conversion cycles in depth before this.

EDIT - This really bothered me while having dinner last night. So first thing this morning I decided to use scope on the ADTRG0 and it come out as permanent +5V, no pulse (at 5ms setting) with the scope. So Its a strong possibility that its ATU that triggers ADI1 and ADI0. Of course it could be me just having one of the scope settings incorrect or measuring a wrong pin, but other signals on the board were just as they should be...

-- Edited by PetriK at 09:56, 2008-01-01


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Posts: 80

Thanks Petri, I too am skeptical about ADTRG0 ... mainly because it doesn't seem to be physically connected to anything. But the code that sets everything up suggests otherwise. I think perhaps there is other code in there that changes the configuration to ATU-triggering but I haven't found it yet.

I don't know why I am interested in this. It's a lot of detective work for little or no gain.

I think I just like tying up loose ends.


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